Singapore University of Social Sciences

Design of Logic Systems

Applications Open: To be confirmed

Applications Close: To be confirmed

Next Available Intake: To be confirmed

Course Types: To be confirmed

Language: English

Duration: 6 months

Fees: To be confirmed

Area of Interest: Science & Technology

Schemes: To be confirmed

Funding: To be confirmed


Synopsis

The central theme of this course is the analysis, specification and design of a wide variety of digital circuits. Students will learn the theory and application of logic design methods, and use computer-based design packages widely employed in industry. They will undertake design exercises, translating system specifications into circuits that could then be simulated on the computer.

Level: 1
Credit Units: 5
Presentation Pattern: EVERY SEMESTER

Topics

  • Introduction to VHDL
  • VHDL for combinational logic devices
  • VHDL for sequential logic devices
  • Logic Function Optimization
  • Synchronous sequential circuit design
  • Synchronous sequential circuit analysis
  • Asynchronous sequential circuit analysis
  • Asynchronous sequential circuit design
  • State reduction and assignment in asynchronous sequential circuiy design
  • Hazards in asynchronous sequential circuit
  • Testing of digital logic circuits

Learning Outcome

  • Draw gate-level schematic diagrams and signal waveforms for logic circuits.
  • Use Boolean Algebra, Karnaugh map, Quine-Mc-Cluskey methods to simplify logic circuits for optimal costs.
  • Identify the prime implicants, static hazards and other characteristics of logic circuits.
  • Present the state diagram, excitation table, state table and flow table for FSM.
  • Implement logic circuits and logic functions using suitable components.
  • Give cost, minimized expression, test vectors for logic circuits.
  • Write VHDL code for corresponding logic circuits and logic functions.
  • Design logic systems for the specified requirements.
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