Singapore University of Social Sciences

VLSI Design 2 (ENG328)

Applications Open: 01 May 2024

Applications Close: 15 June 2024

Next Available Intake: July 2024

Language: English

Duration: 6 months

Fees: \$1844.26 View More Details on Fees

Area of Interest: Science and Technology

Schemes: Alumni Continuing Education (ACE)

Funding: SkillsFuture

School/Department: School of Science and Technology

Synopsis

This course is a continuation of VLSI Design I (ENG327). You are expected to have grasped all basic understanding on MOS transistors and CMOS process flow. ENG328 extend the knowledge you had gained in ENG327, to embark on the designing process of advanced logic circuits. The course takes you through the processes of designing combinational and sequential logic circuits. Emphasis is focused on building an understanding of difference design styles, the IC design methodologies, the physical implementation of combinational and sequential logic network, and the physical routing and placement issues, which are essential to the practice of VLSI design as a system design discipline. Computer aided design (CAD) and simulation packages will also be introduced to you in the areas of digital and analog signal design and simulation. These tools are used to layout the circuit designs, to predict the circuit performance and to verify the correctness of the circuits and logic.

Level: 3
Credit Units: 5
Presentation Pattern: EVERY JULY

Topics

• Design a combination circuit using various circuit families (e.g. CMOS, Ratioed Circuit, CVSL, etc.).
• Combinational Circuit Design II
• Sequential Circuit Design
• Testing and Verification
• Datapath Subsystems
• Array Subsystems

Learning Outcome

• Design a combination circuit using various circuit families (e.g. CMOS, Ratioed Circuit, CVSL, etc.).
• Indicate the circuit pitfalls and revise the circuit for robustness.
• Analyze the given sequential circuit using the various analysis and circuit design techniques.
• Examine the operation and characteristics of circuit elements, and various testing techniques used for IC chip testing (e.g. BIST, scan, boundary scan, etc.).
• Estimate the timing parameters, transistor size and other parameters involved in circuit design.
• Recommend the architecture and/or algorithm for various datapath operators (e.g. adder, comparator, shifter, multiplier, etc.).
• Compare the different types and architectures, operation and circuit implementations of memories.
• Implement logic function using PLA / ROM.